NXP Semiconductors /LPC408x_7x /USB /CLKCTRL

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Interpret as CLKCTRL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLE_THE_HOST_CLO)HOST_CLK_EN 0 (DISABLE_THE_DEVICE_C)DEV_CLK_EN 0 (DISABLE_THE_I2C_CLOC)I2C_CLK_EN 0 (DISABLE_THE_OTG_CLOC)OTG_CLK_EN 0 (DISABLE_THE_AHB_CLOC)AHB_CLK_EN 0RESERVED

OTG_CLK_EN=DISABLE_THE_OTG_CLOC, AHB_CLK_EN=DISABLE_THE_AHB_CLOC, I2C_CLK_EN=DISABLE_THE_I2C_CLOC, HOST_CLK_EN=DISABLE_THE_HOST_CLO, DEV_CLK_EN=DISABLE_THE_DEVICE_C

Description

OTG clock controller

Fields

HOST_CLK_EN

Host clock enable

0 (DISABLE_THE_HOST_CLO): Disable the Host clock.

1 (ENABLE_THE_HOST_CLOC): Enable the Host clock.

DEV_CLK_EN

Device clock enable

0 (DISABLE_THE_DEVICE_C): Disable the Device clock.

1 (ENABLE_THE_DEVICE_CL): Enable the Device clock.

I2C_CLK_EN

I2C clock enable

0 (DISABLE_THE_I2C_CLOC): Disable the I2C clock.

1 (ENABLE_THE_I2C_CLOCK): Enable the I2C clock.

OTG_CLK_EN

OTG clock enable. In device-only applications, this bit enables access to the PORTSEL register.

0 (DISABLE_THE_OTG_CLOC): Disable the OTG clock.

1 (ENABLE_THE_OTG_CLOCK): Enable the OTG clock.

AHB_CLK_EN

AHB master clock enable

0 (DISABLE_THE_AHB_CLOC): Disable the AHB clock.

1 (ENABLE_THE_AHB_CLOCK): Enable the AHB clock.

RESERVED

Reserved. Read value is undefined, only zero should be written.

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